Tuesday, 12 October 2004 - 5:35 PM

This presentation is part of : Sub-wavelength Nanostructuring I

Ultra-Fast Thermal Stress with Lasers for Reliability Test on 0.13 um Low k IC Chips

Zhihong Mai1, Seng-Keat Lim, SINGAPORE, Jeffrey Lam, USA, and Yongfeng Lu2. (1) Chartered Semiconductor Manufacturing Ltd, 60 Woodlands, Industrial Park D, Street 2, Singapore, 738406, Singapore, (2) University of Nebraska-Lincoln, Lincoln, NE 68588, Lincoln, NE 68588


The methodology of ultra-fast thermal stress with lasers for reliability test on low k IC chips was proposed. A setup was established. In a general aspect of this paper, pulsed lasers were used to generate ultra-fast thermal stress at the interfaces in the multilayer structures of the low k IC chips. The laser energy was adjustable with an attenuator and was monitored with a power meter through a beam sampler. The beam quality was improved with a beam expander and a homogenizer. An aperture was used to expose the chip to the laser irradiation. The pulse duration and pulse repetition rate was adjusted to generate different thermal effect on the chip. A laser beam was incident from the front side of chips. Laser wavelength was selected depending on which layer we intend to stress. Lasers in the range of visible light can penetrate the passivation, IMD and liner layers and can be adsorbed by Si, while infrared lasers will be absorbed by passivation and IMD layers. Our setup was applicable for the application with a laser at wavelength from the region of visible light to that of far infrared. The thermal diffusion length was determined by adjust the pulse duration and pulse repetition.

Keywords: Laser, Low K, IC, and thermal stress.

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